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Creating Reusable Design Blocks: IP Design & Implementation with the Intel® Quartus® Prime Software
Altera
This training is part 2 of 3. As FPGA designs get larger and more complicated, intellectual property (IP) is being used more often to help reduce time-to-market. Including IP allows designers to focus on new aspects of their design and improve existing designs instead of spending time recreating what’s been done before. But what if you want to create your own IP? This training focuses on all aspects of how to create good reusable IP, including the IP user flow, the creation of IP files, the packaging of the IP, as well as other important factors to consider during the creation process.
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