March 23, 2016

 

TOKYO– Toshiba Corporation's (TOKYO: 6502) Semiconductor & Storage Products Company announced today the immediate availability of an IP subsystem (*1) developed in conjunction with MoreThanIP, a provider of leading edge telecom solutions. It consists of a 10 Gigabit Ethernet MAC (media access controller :*2), PCS (physical coding sublayer :*3) and High speed SerDes (Serializer Deserializer :*4) on custom LSI platforms, including ASIC and FFSA™ (*5).

The IP subsystem implements a 4-Lane XAUI (*6) or a single Lane XFI (*7) interface that provides connectivity to a large number of Ethernet PHYs and Controller ASSPs (Application Specific Standard Products). With support for PFC (Priority Flow Control :*8)  and a high level of flexibility, the IP subsystem is particularly suited for data centers and telecoms applications.

“Together with Toshiba custom LSI solutions and MoreThanIP proven Cores, chip producers will now have an integrated solution at their disposal to help speed the design cycle and meet the needs of the growing high-speed Ethernet market,” said Francois Balay, CEO of MoreThanIP.

“Collaboration with MoreThanIP allows us to propose an integrated Ethernet offering with best-in-class IP Cores for custom LSI solutions,” said Yukihiro Urakawa, Technical Executive of Toshiba.

Toshiba leverages comprehensive expertise from design to manufacture to offer a wide range of custom LSI solutions. FFSATM is a new, flexible custom LSI solution with pre-designed masters featuring configurable I/Os, SerDes, SRAMs and logic devices that can be configured according to customer requirements.

Going forward, Toshiba will continue to provide solutions that help customers to optimize their system design and achieve timely product development.

*FFSA is a trademark of Toshiba Corporation
 (*1): IP subsystem: The IP solution consists of IPs which is required to develop system LSI. It is designed to implement into high-speed interface subsystem easily.

 (*2): MAC: Data transfer control technology such as frame synchronization, flow control and error checking.

 (*3): PCS: Physical protocol layer of high-speed Ethernet, Gigabit Ethernet and 10Gigabit Ethernet which encodes the data.

 (*4): SerDes: A pair of functional blocks which convert data between serial data and parallel interfaces in each direction for high speed communications.

 (*5): FFSA™: Technology enables Toshiba to develop integrated circuits with much lower development costs and much shorter development turn-around times by reducing the number of metal layers that must be customized.
http://toshiba.semicon-storage.com/ap-en/product/asic/structured-arrays.html?mm=cp160323&no=08

 (*6): XAUI: Electrical interface for 10 Gigabit Ethernet to communicate by 4 lane serial line. 

 (*7): XFI: Electrical interface for 10 Gigabit Ethernet to communicate by 1 lane serial line.

 (*8): PFC: Technology defined in IEEE 802.1Qbb for lossless Ethernet communication with priority flow control for each data.

To find out more about Toshiba custom LSI solutions, visit
http://toshiba.semicon-storage.com/ap-en/product/asic.html?mm=cp160323&no=09

*Information in this document, including product prices and specifications, content of services and contact information, is current on the date of the announcement but is subject to change without prior notice.

Toshiba Corporation- Semiconductor and Storage Products Company　Website＞http://toshiba.semicon-storage.com/ap-en?mm=cp160323&no=10

 

 

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Companies Website:
http://toshiba.semicon-storage.com/ap-en?mm=cp160323&no=10

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